Design-Reuse

DDR SDRAM Controller IP Designed for Reuse

This paper deals with reusability issues in the development of a double data rate (DDR) SDRAM controller module for FPGA-based systems. The development of integrated systems-on-a-chip (SoC) is based ...
EDN

Implementing custom DDR and DDR2 SDRAM external memory interfaces in FPGAs (part 2)

Note: This is the second part of a two-part article covers the remaining steps to implement DDR or DDR2 external memory interfaces (EMIFs) using FPGAs via ALTDLL and ALTDQ_DQS megafunctions. Steps 4 ” ...
Semiconductor Engineering

The Importance Of Using The Right DDR SDRAM Memory

Selecting the right memory technology is often the most critical decision for achieving the optimal system performance. Designers continue to add more cores and functionality to their SoCs; however, ...
GIZBOT

DDR2 Vs DDR3 Vs DDR4 Vs DDR5 RAM: How are they different

Double data rate synchronous dynamic random-access memory or DDR SDRAM, if you want to keep it simple is a type of memory integrated circuits that are being used in computers nowadays. RAM or ...
PC Magazine

DDR vs. DDR2 vs. DDR3: Types Of RAM Explained

Our team tests, rates, and reviews more than 1,500 products each year to help you make better buying decisions and get more from technology. At its most basic, DDR3 is the current standard for system ...
Digi Times

DDR output tops SDRAM for first time

DDR has officially surpassed SDRAM in output for the first time, according to DRAMeXchange’s global September DRAM shipment statistics released on October 1. Save my User ID and Password Some ...
TechSpot

Tech Primer: What you need to know about DDR4 memory

Most computer technologies only last a short time before they are replaced by something new, but DDR RAM is one of the few that tends to last a while before being replaced. The original DDR SDRAM was ...
Design-Reuse

Implementing custom DDR and DDR2 SDRAM external memory interfaces in FPGAs (part 1)

This is a two-part article that focuses on the design guidelines and describes how to implement DDR or DDR2 external memory interfaces (EMIFs) using FPGAs via ALTDLL and ALTDQ_DQS megafunctions. This ...
EDN

Implementing custom DDR and DDR2 SDRAM external memory interfaces in FPGAs (part 1)

These design guidelines provide the best practices for DDR and DDR2 SDRAM custom memory interface implementation in Stratix III and Stratix IV FPGAs. Figure 1 shows the design flow that is required ...